Current Issue : April-June Volume : 2026 Issue Number : 2 Articles : 5 Articles
Neuromorphic computing system requires precise control over synaptic retention characteristics to emulate both short-term and long-term memory functions of biological neural networks. Here, a solution-processed approach is presented for the fabrication of alkali metal cation-embedded hafnium dioxide (HfO2) dielectrics that promote tunable synaptic behavior in transistor-based electronics. By incorporating sodium fluoride (NaF) into electrochemically exfoliated hafnium disulfide (HfS2) nanosheets, followed by thermal oxidation, a uniform, ultrathin (≈8 nm) HfO2 film is produced with embedded mobile alkali ions on a wafer-scale substrate. With a semiconducting indium gallium zinc oxide layer, the resulting transistors demonstrate distinct retention characteristics, with pristine HfO2-based devices exhibiting short-term switching behavior and NaF-incorporated HfO2 (NaF-HfO2)-based devices demonstrating long-term retention exceeding 30 s with tunable synaptic plasticity. It successfully demonstrates the practical application of these ion-engineered dielectrics in 1-transistor-1-synapse memory arrays, synaptic comparators, and reconfigurable AND/OR logic gates that mimic brain-like information processing. The solution-processable approach expands the range of dielectric modification, providing a scalable pathway for next-generation neuromorphic computing technologies with controllable synaptic functionalities....
Wave-based platforms for unconventional computing require a controlled yet adjustable flow of wave information, integrated with non-volatile data storage. Spin waves are ideal for such platforms due to their inherent nonreciprocal properties and direct interaction with magnetic storage. This study demonstrates how spin-wave nonreciprocity, induced by dipolar interactions in nanowaveguides with antiparallel out-of-plane magnetization, enables the realization of a spin-wave circulator for unidirectional signal transport and advanced routing. The device’s functionality can be continuously reconfigured using a magnetic domain wall with adjustable position, offering non-volatile control over output and nonreciprocity. These features are illustrated using a spinwave directional coupler, validated through micromagnetic simulations and analytical models, which also support the functions of a waveguide crossing, tunable power splitter, and frequency multiplexer. The proposed domain-wall-based reconfiguration, combined with nonlinear spin-wave behavior, holds promise for developing a nanoscale, nonlinear wave computing platform with self-learning capabilities....
Next-generation photonic memory, leveraging broad spectral operability and electromagnetic immunity, enables ultrafast data storage with high density, overcoming the physical limitations of silicon-based electronic memory in the post-Moore era. Phase-change materials (PCMs) are particularly promising for photonic memory due to their exceptional optical contrast between amorphous and crystalline states. Furthermore, photonic phase-change memory can be deployed as tunable components (such as optical attenuators and delay lines) within reconfigurable integrated photonic systems for telecommunications and computing. Here, we optimize the thickness of PCM cells to maximize crystalline-state light absorption and enhance transmission contrast. The resulting photonic memory achieves outstanding performance: ultralow-energy programming (0.96 pJ/operation), 9 fJ detection sensitivity, >105 s retention, 6000-cycle endurance, and multi-level storage capacity (209 distinct states). Furthermore, by structuring the PCM into a micro-cylinder array atop a PCM film, we achieve stable transmission contrast through 2 × 106 cycles—far exceeding the durability of single-cell structures—and an 8.69 dB improvement in contrast over film-free micro-cylinder arrays. These advances highlight the critical role of microstructural optimization in enabling high-performance, on-chip photonic memory for future integrated photonic telecommunication and computing systems....
To overcome the limitations of Orthogonal Frequency Division Multiplexing (OFDM) under mobility conditions, several alternative waveforms have been proposed, each offering distinct benefits and limitations. A promising approach for future wireless communications, including 6G and beyond, is to unify these waveforms to accommodate diverse operating conditions and user requirements. However, processing multiple computationally intensive waveforms on a traditional Application-Specific Integrated Circuit (ASIC) is impractical due to its fixed design. In contrast, Coarse-Grained Reconfigurable Array (CGRA), a typical class of reconfigurable architectures, provides greater flexibility and efficiency, making it a more feasible alternative for such demanding workloads. In this paper, we propose a unified modulator framework that integrates five different waveforms onto a single CGRA platform. This approach demonstrates the run-time reconfiguration capabilities of CGRAs, enabling seamless switching between waveforms to support a unified modulation model. To optimize execution, this work explores overlapping computational and memory-access patterns for the target waveforms, enhancing performance and efficiency. For evaluation, the proposed design is synthesized on a Stratix-IV FPGA device and compared against existing implementations that focus on fixed, single-waveform architectures. The unified modulator implementation achieves an operating frequency of 170.0 MHz, a throughput of 10.88 GOPS and a dynamic power dissipation of 528 mW. Additionally, the scalability of the proposed approach is evaluated across various input sizes (8×4, 8×8, 16×16), demonstrating its flexibility with promising results....
This study aims to implement universal logic gates using polarity control within a single silicon transistor structure. For this purpose, a reconfigurable transistor based on a p-i-n structure featuring two polarity gates (PGs) and one control gate was proposed, and its electrical characteristics and logic-in-memory (LIM) circuit operations were analyzed via two-dimensional technology computer-aided design simulations. The proposed device could be perfectly reconfigured into p-channel or n-channel modes because virtual doping effects could be induced according to the polarity of the PG voltage. Moreover, based on the positive feedback and latch-up phenomena, a steep subthreshold swing of approximately 1 mV/dec and a high ON/OFF current ratio of the order of 1010 were achieved. Building on these characteristics, we successfully verified NAND LIM operation in the p-channel mode and NOR LIM operation in the n-channel mode by connecting two of the proposed devices in parallel. The reconfigurable silicon transistor proposed in this study could perform both NAND and NOR LIM operations while sharing the same device structure and can be expected to play a key role in implementing high-density, low-power LIM systems in the future....
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